An exemplary embodiment relates generally to a nonvolatile memory device and a method of manufacturing the same and, more particularly, to a nonvolatile memory device and a method of manufacturing the same, in which the height of selection lines is lower than the height of word lines, thereby being capable of preventing voids from occurring between the selection lines when an interlayer dielectric is formed.
In a nonvolatile memory device having a string structure, to reduce the size of the string, the size of cells, the size of selection lines, and the size of a space between the selection lines is reduced. With the size of the space between the selection lines being reduced, the gap-fill margin of an insulating layer for filling the space is reduced. Accordingly, in a process of forming the insulating layer, voids may be generated in the space portion. If drain contact holes or source contact holes are formed with the voids present, it is difficult to obtain contact holes of a desired form. Furthermore, a breakdown voltage margin between the selection line and the drain contact plug or between the selection line and the source contact plug is reduced, the rate of device failure is increased, and a breakdown voltage margin between the drain contact plugs is also reduced, also resulting in device failure. To prevent the occurrence of the voids, a deposition process and an etch process are repeatedly performed on the insulating layer to fill the space. In this case, however, manufacturing turnaround time and costs are increased because of the additional process steps.